CPU control and status registers. More...

Macros
#define	REG_HDMAEN ((vu8)0x420C)
	HDMA enable (W).
#define	REG_HTIMEH ((vu8)0x4208)
	H-count timer high (W).
#define	REG_HTIMEL ((vu8)0x4207)
	H-count timer low (W).
#define	REG_HVBJOY ((vu8)0x4212)
	H/V blank and joypad status (R).
#define	REG_JOY1H ((vu8)0x4219)
	Joypad 1 data high (R).
#define	REG_JOY1L ((vu8)0x4218)
	Joypad 1 data low (R).
#define	REG_JOY2H ((vu8)0x421B)
	Joypad 2 data high (R).
#define	REG_JOY2L ((vu8)0x421A)
	Joypad 2 data low (R).
#define	REG_JOY3H ((vu8)0x421D)
	Joypad 3 data high (R).
#define	REG_JOY3L ((vu8)0x421C)
	Joypad 3 data low (R).
#define	REG_JOY4H ((vu8)0x421F)
	Joypad 4 data high (R).
#define	REG_JOY4L ((vu8)0x421E)
	Joypad 4 data low (R).
#define	REG_JOYA ((vu8)0x4016)
	Joypad Port A data/strobe (R/W: read serial data, write bit 0 to latch).
#define	REG_JOYB ((vu8)0x4017)
	Joypad Port B data (R: read serial data for port 2).
#define	REG_MDMAEN ((vu8)0x420B)
	DMA enable (W).
#define	REG_MEMSEL ((vu8)0x420D)
	FastROM enable (W).
#define	REG_NMITIMEN ((vu8)0x4200)
	Interrupt enable (W).
#define	REG_RDDIVH ((vu8)0x4215)
	Division result high (R).
#define	REG_RDDIVL ((vu8)0x4214)
	Division result low (R).
#define	REG_RDIO ((vu8)0x4213)
	I/O port read (R).
#define	REG_RDMPYH ((vu8)0x4217)
	Multiplication result high (R).
#define	REG_RDMPYL ((vu8)0x4216)
	Multiplication result low (R).
#define	REG_RDNMI ((vu8)0x4210)
	NMI flag and version (R).
#define	REG_TIMEUP ((vu8)0x4211)
	IRQ flag (R).
#define	REG_VTIMEH ((vu8)0x420A)
	V-count timer high (W).
#define	REG_VTIMEL ((vu8)0x4209)
	V-count timer low (W).
#define	REG_WRDIVB ((vu8)0x4206)
	Divisor (W).
#define	REG_WRDIVH ((vu8)0x4205)
	Dividend high (W).
#define	REG_WRDIVL ((vu8)0x4204)
	Dividend low (W).
#define	REG_WRIO ((vu8)0x4201)
	I/O port write (W).
#define	REG_WRMPYA ((vu8)0x4202)
	Multiplicand A (W).
#define	REG_WRMPYB ((vu8)0x4203)
	Multiplicand B (W).

Detailed Description

CPU control and status registers.

Macro Definition Documentation

◆ REG_HDMAEN

#define REG_HDMAEN (*(vu8*)0x420C)

HDMA enable (W).

◆ REG_HTIMEH

#define REG_HTIMEH (*(vu8*)0x4208)

H-count timer high (W).

◆ REG_HTIMEL

#define REG_HTIMEL (*(vu8*)0x4207)

H-count timer low (W).

◆ REG_HVBJOY

#define REG_HVBJOY (*(vu8*)0x4212)

H/V blank and joypad status (R).

◆ REG_JOY1H

#define REG_JOY1H (*(vu8*)0x4219)

Joypad 1 data high (R).

◆ REG_JOY1L

#define REG_JOY1L (*(vu8*)0x4218)

Joypad 1 data low (R).

◆ REG_JOY2H

#define REG_JOY2H (*(vu8*)0x421B)

Joypad 2 data high (R).

◆ REG_JOY2L

#define REG_JOY2L (*(vu8*)0x421A)

Joypad 2 data low (R).

◆ REG_JOY3H

#define REG_JOY3H (*(vu8*)0x421D)

Joypad 3 data high (R).

◆ REG_JOY3L

#define REG_JOY3L (*(vu8*)0x421C)

Joypad 3 data low (R).

◆ REG_JOY4H

#define REG_JOY4H (*(vu8*)0x421F)

Joypad 4 data high (R).

◆ REG_JOY4L

#define REG_JOY4L (*(vu8*)0x421E)

Joypad 4 data low (R).

◆ REG_JOYA

#define REG_JOYA (*(vu8*)0x4016)

Joypad Port A data/strobe (R/W: read serial data, write bit 0 to latch).

◆ REG_JOYB

#define REG_JOYB (*(vu8*)0x4017)

Joypad Port B data (R: read serial data for port 2).

◆ REG_MDMAEN

#define REG_MDMAEN (*(vu8*)0x420B)

DMA enable (W).

◆ REG_MEMSEL

#define REG_MEMSEL (*(vu8*)0x420D)

FastROM enable (W).

◆ REG_NMITIMEN

#define REG_NMITIMEN (*(vu8*)0x4200)

Interrupt enable (W).

◆ REG_RDDIVH

#define REG_RDDIVH (*(vu8*)0x4215)

Division result high (R).

◆ REG_RDDIVL

#define REG_RDDIVL (*(vu8*)0x4214)

Division result low (R).

◆ REG_RDIO

#define REG_RDIO (*(vu8*)0x4213)

I/O port read (R).

◆ REG_RDMPYH

#define REG_RDMPYH (*(vu8*)0x4217)

Multiplication result high (R).

◆ REG_RDMPYL

#define REG_RDMPYL (*(vu8*)0x4216)

Multiplication result low (R).

◆ REG_RDNMI

#define REG_RDNMI (*(vu8*)0x4210)

NMI flag and version (R).

◆ REG_TIMEUP

#define REG_TIMEUP (*(vu8*)0x4211)

IRQ flag (R).

◆ REG_VTIMEH

#define REG_VTIMEH (*(vu8*)0x420A)

V-count timer high (W).

◆ REG_VTIMEL

#define REG_VTIMEL (*(vu8*)0x4209)

V-count timer low (W).

◆ REG_WRDIVB

#define REG_WRDIVB (*(vu8*)0x4206)

Divisor (W).

◆ REG_WRDIVH

#define REG_WRDIVH (*(vu8*)0x4205)

Dividend high (W).

◆ REG_WRDIVL

#define REG_WRDIVL (*(vu8*)0x4204)

Dividend low (W).

◆ REG_WRIO

#define REG_WRIO (*(vu8*)0x4201)

I/O port write (W).

◆ REG_WRMPYA

#define REG_WRMPYA (*(vu8*)0x4202)

Multiplicand A (W).

◆ REG_WRMPYB

#define REG_WRMPYB (*(vu8*)0x4203)

Multiplicand B (W).

Macros