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SNES Memory Map

Complete memory layout reference for SNES development.

Address Space Overview

The 65816 CPU has a 24-bit address bus, allowing access to 16 MB of memory. The address format is $BB:AAAA where BB is the bank (0-255) and AAAA is the offset within that bank (0-65535).

LoROM Memory Map (Default)

Bank Address Size Description
────────────────────────────────────────────────────────────────
$00-$3F $0000-$1FFF 8 KB Work RAM mirror (first 8KB)
$2000-$20FF 256 Unused
$2100-$21FF 256 PPU Registers (Video)
$2200-$2FFF 3.5 KB Unused
$3000-$3FFF 4 KB DSP, SuperFX, etc. (expansion)
$4000-$40FF 256 Old-style joypad registers
$4200-$44FF 768 CPU Registers (DMA, IRQ, etc.)
$4500-$5FFF 7 KB Unused
$6000-$7FFF 8 KB Expansion RAM (if present)
$8000-$FFFF 32 KB ROM (banks 0-63)
$40-$6F $0000-$7FFF 32 KB ROM (continued)
$8000-$FFFF 32 KB ROM (continued)
$70-$7D $0000-$7FFF 32 KB SRAM (if present)
$8000-$FFFF 32 KB ROM
$7E $0000-$1FFF 8 KB Work RAM (direct access)
$2000-$FFFF 56 KB Work RAM (general use)
$7F $0000-$FFFF 64 KB Work RAM (high bank)
$80-$BF Mirror of $00-$3F
$C0-$FF Mirror of $40-$7F (ROM only)

Key Memory Regions

Work RAM ($7E:0000 - $7F:FFFF)

128 KB of general-purpose RAM.

Range Size Common Use
$7E:0000-$7E:00FF 256 B Direct Page (fast access)
$7E:0100-$7E:01FF 256 B Stack
$7E:0200-$7E:1FFF 7.5 KB Variables, BSS
$7E:2000-$7E:FFFF 56 KB General use
$7F:0000-$7F:FFFF 64 KB General use / buffers

Video RAM ($2116-$2119)

64 KB accessed through registers, not directly mapped.

Range Common Use
$0000-$3FFF Background tiles
$4000-$7FFF Sprite tiles
$8000-$FFFF Tilemaps

Actual layout depends on your configuration.

OAM (Object Attribute Memory)

544 bytes accessed through registers $2102-$2104.

// Structure per sprite (bytes 0-511, 4 bytes each)
struct OAM_Entry {
u8 x_low; // X position (low 8 bits)
u8 y; // Y position
u8 tile; // Tile number (low 8 bits)
u8 attr; // vhoopppc (flip, priority, palette, tile high)
};
// Extension table (bytes 512-543)
// 2 bits per sprite: X high bit, size select
static u16 bx
Definition main.c:159
unsigned char u8
8-bit unsigned integer (0 to 255)
Definition types.h:46

CGRAM (Color RAM)

512 bytes (256 colors x 2 bytes each).

Range Use
0-255 Background palettes (16 palettes x 16 colors)
256-511 Sprite palettes (8 palettes x 16 colors)

Color format: 0BBBBBGGGGGRRRRR (15-bit)

PPU Registers ($2100-$213F)

Address Name Description
$2100 INIDISP Display control
$2101 OBJSEL Sprite settings
$2102-03 OAMADDL/H OAM address
$2104 OAMDATA OAM data write
$2105 BGMODE BG mode and tile size
$2106 MOSAIC Mosaic effect
$2107-0A BGnSC BG tilemap addresses
$210B-0C BGnNBA BG tile data addresses
$210D-14 BGnHOFS/VOFS BG scroll positions
$2115 VMAIN VRAM address increment
$2116-17 VMADDL/H VRAM address
$2118-19 VMDATAL/H VRAM data write
$211A M7SEL Mode 7 settings
$211B-20 M7A-D/X/Y Mode 7 matrix
$2121 CGADD CGRAM address
$2122 CGDATA CGRAM data write
$212C-2D TM/TS Main/sub screen enable
$212E-2F TMW/TSW Window masks
$2130-32 CGWSEL/CGADSUB/COLDATA Color math
$2133 SETINI Screen settings

CPU Registers ($4200-$44FF)

Address Name Description
$4200 NMITIMEN Interrupt enable
$4201 WRIO I/O port write
$4202-03 WRMPYA/B Multiplication operands
$4204-06 WRDIVL/H/B Division operands
$4207-0A HTIMEL/H, VTIMEL/H IRQ timer
$420B MDMAEN DMA enable
$420C HDMAEN HDMA enable
$420D MEMSEL FastROM enable
$4210 RDNMI NMI flag
$4211 TIMEUP IRQ flag
$4212 HVBJOY H/V blank and joypad status
$4214-17 RDDIVL/H, RDMPYL/H Division/multiplication result
$4218-1F JOY1L-4H Joypad data

DMA Registers ($43x0-$43xF)

8 DMA channels (x = 0-7):

Offset Name Description
$43x0 DMAPx DMA parameters
$43x1 BBADx B-bus address
$43x2-04 A1TxL/H/B A-bus address
$43x5-06 DASxL/H Transfer size / HDMA count
$43x7 DASBx HDMA indirect bank
$43x8-09 A2AxL/H HDMA table address
$43xA NTRLx HDMA line counter

Example: Setting Up Memory

// Define variables in different memory regions
#pragma bss-name(push, "BSS") // Goes to $7E:0200+
#pragma bss-name(push, "HRAM") // Goes to $7F:0000+
// Direct page variables (fast access)
#pragma zeropage-name(push, "ZEROPAGE")
static u8 frame_counter
Global frame counter for animation timing.
Definition main.c:62
unsigned short u16
16-bit unsigned integer (0 to 65535)
Definition types.h:52

Enhancement Chip Memory

SA-1 Cartridge

The SA-1 adds a second 65816 CPU and extra RAM to the cartridge.

Address Size Description
────────────────────────────────────────────────────────────────
$2200-$23FF 512 B SA-1 registers (CPU control, DMA, math, IRQ)
$3000-$37FF 2 KB I-RAM (shared between SNES CPU and SA-1)
$6000-$7FFF 8 KB BW-RAM window (8 KB view into BW-RAM)
$40-$5F:0000 up to BW-RAM (up to 256 KB of fast static RAM)
256 KB

I-RAM ($3000-$37FF) is the primary communication channel between the SNES main CPU and the SA-1. Both processors can read and write it, gated by the SIWP ($2229) and CIWP ($222A) write-protection registers.

BW-RAM is battery-backed SRAM mapped in banks $40-$5F, with an 8 KB window visible at $6000-$7FFF for convenient access from bank $00 code.

SuperFX Cartridge

The SuperFX (GSU) has its own register space and uses cartridge SRAM as a shared framebuffer.

Address Size Description
────────────────────────────────────────────────────────────────
$3000-$303F 64 B GSU registers (R0-R15, SFR, SCMR, PBR, etc.)
$3100-$32FF 512 B GSU code cache (read-only from SNES side)
$70-$71:0000 32-64 KB Cartridge SRAM (shared framebuffer + data)

GSU registers ($3000-$303F) control the SuperFX processor. The SNES CPU writes parameters and starts the GSU by writing to R15 ($301E-$301F).

Code cache ($3100-$32FF) holds the currently cached GSU instructions. The SNES can read but not write this region.

Cartridge SRAM ($70-$71) serves as the GSU framebuffer. The SuperFX PLOT instruction writes pixels here, and the SNES reads it back for display. Bus ownership is controlled by the SCMR register ($303A) — the SNES and GSU cannot access SRAM simultaneously.

Further Reading