Complete memory layout reference for SNES development.
The 65816 CPU has a 24-bit address bus, allowing access to 16 MB of memory. The address format is $BB:AAAA where BB is the bank (0-255) and AAAA is the offset within that bank (0-65535).
128 KB of general-purpose RAM.
| Range | Size | Common Use |
|---|---|---|
| $7E:0000-$7E:00FF | 256 B | Direct Page (fast access) |
| $7E:0100-$7E:01FF | 256 B | Stack |
| $7E:0200-$7E:1FFF | 7.5 KB | Variables, BSS |
| $7E:2000-$7E:FFFF | 56 KB | General use |
| $7F:0000-$7F:FFFF | 64 KB | General use / buffers |
64 KB accessed through registers, not directly mapped.
| Range | Common Use |
|---|---|
| $0000-$3FFF | Background tiles |
| $4000-$7FFF | Sprite tiles |
| $8000-$FFFF | Tilemaps |
Actual layout depends on your configuration.
544 bytes accessed through registers $2102-$2104.
512 bytes (256 colors x 2 bytes each).
| Range | Use |
|---|---|
| 0-255 | Background palettes (16 palettes x 16 colors) |
| 256-511 | Sprite palettes (8 palettes x 16 colors) |
Color format: 0BBBBBGGGGGRRRRR (15-bit)
| Address | Name | Description |
|---|---|---|
| $2100 | INIDISP | Display control |
| $2101 | OBJSEL | Sprite settings |
| $2102-03 | OAMADDL/H | OAM address |
| $2104 | OAMDATA | OAM data write |
| $2105 | BGMODE | BG mode and tile size |
| $2106 | MOSAIC | Mosaic effect |
| $2107-0A | BGnSC | BG tilemap addresses |
| $210B-0C | BGnNBA | BG tile data addresses |
| $210D-14 | BGnHOFS/VOFS | BG scroll positions |
| $2115 | VMAIN | VRAM address increment |
| $2116-17 | VMADDL/H | VRAM address |
| $2118-19 | VMDATAL/H | VRAM data write |
| $211A | M7SEL | Mode 7 settings |
| $211B-20 | M7A-D/X/Y | Mode 7 matrix |
| $2121 | CGADD | CGRAM address |
| $2122 | CGDATA | CGRAM data write |
| $212C-2D | TM/TS | Main/sub screen enable |
| $212E-2F | TMW/TSW | Window masks |
| $2130-32 | CGWSEL/CGADSUB/COLDATA | Color math |
| $2133 | SETINI | Screen settings |
| Address | Name | Description |
|---|---|---|
| $4200 | NMITIMEN | Interrupt enable |
| $4201 | WRIO | I/O port write |
| $4202-03 | WRMPYA/B | Multiplication operands |
| $4204-06 | WRDIVL/H/B | Division operands |
| $4207-0A | HTIMEL/H, VTIMEL/H | IRQ timer |
| $420B | MDMAEN | DMA enable |
| $420C | HDMAEN | HDMA enable |
| $420D | MEMSEL | FastROM enable |
| $4210 | RDNMI | NMI flag |
| $4211 | TIMEUP | IRQ flag |
| $4212 | HVBJOY | H/V blank and joypad status |
| $4214-17 | RDDIVL/H, RDMPYL/H | Division/multiplication result |
| $4218-1F | JOY1L-4H | Joypad data |
8 DMA channels (x = 0-7):
| Offset | Name | Description |
|---|---|---|
| $43x0 | DMAPx | DMA parameters |
| $43x1 | BBADx | B-bus address |
| $43x2-04 | A1TxL/H/B | A-bus address |
| $43x5-06 | DASxL/H | Transfer size / HDMA count |
| $43x7 | DASBx | HDMA indirect bank |
| $43x8-09 | A2AxL/H | HDMA table address |
| $43xA | NTRLx | HDMA line counter |
The SA-1 adds a second 65816 CPU and extra RAM to the cartridge.
I-RAM ($3000-$37FF) is the primary communication channel between the SNES main CPU and the SA-1. Both processors can read and write it, gated by the SIWP ($2229) and CIWP ($222A) write-protection registers.
BW-RAM is battery-backed SRAM mapped in banks $40-$5F, with an 8 KB window visible at $6000-$7FFF for convenient access from bank $00 code.
The SuperFX (GSU) has its own register space and uses cartridge SRAM as a shared framebuffer.
GSU registers ($3000-$303F) control the SuperFX processor. The SNES CPU writes parameters and starts the GSU by writing to R15 ($301E-$301F).
Code cache ($3100-$32FF) holds the currently cached GSU instructions. The SNES can read but not write this region.
Cartridge SRAM ($70-$71) serves as the GSU framebuffer. The SuperFX PLOT instruction writes pixels here, and the SNES reads it back for display. Bus ownership is controlled by the SCMR register ($303A) — the SNES and GSU cannot access SRAM simultaneously.