DMA channel registers (x = channel 0-7) More...
Macros | |
| #define | REG_A1B(n) (*(vu8*)(0x4304 + ((n) << 4))) |
| DMA A-bus bank for channel n. | |
| #define | REG_A1TH(n) (*(vu8*)(0x4303 + ((n) << 4))) |
| DMA A-bus address high for channel n. | |
| #define | REG_A1TL(n) (*(vu8*)(0x4302 + ((n) << 4))) |
| DMA A-bus address low for channel n. | |
| #define | REG_BBAD(n) (*(vu8*)(0x4301 + ((n) << 4))) |
| DMA B-bus address for channel n. | |
| #define | REG_DASH(n) (*(vu8*)(0x4306 + ((n) << 4))) |
| DMA size high for channel n. | |
| #define | REG_DASL(n) (*(vu8*)(0x4305 + ((n) << 4))) |
| DMA size low for channel n. | |
| #define | REG_DMAP(n) (*(vu8*)(0x4300 + ((n) << 4))) |
| DMA parameters for channel n. | |
DMA channel registers (x = channel 0-7)